Solid-state quantum computers require classical electronics to control and readout individual qubits and to enable fast classical data processing. Integrating both subsystems at deep cryogenic temperatures, where solid- state quantum processors operate best, may solve some major scaling challenges, such as system size and Input/Output (I/O) data management.
Spin qubits in silicon Quantum Dots (QDs) could be monolithically integrated with famous Complementary Metal-Oxide-Semiconductor (CMOS) electronics using Very-Large-Scale Integration (VLSI) and thus leveraging over wide manufacturing experience in the semiconductor industry.
However, experimental demonstrations of integration using industrial CMOS at mK temperatures are still in their infancy.
A team of researchers, including Swiss EPFL scientists, has presented a cryogenic Integrated Circuit (IC) fabricated using industrial CMOS technology that hosts three key ingredients of a silicon-based quantum processor: QD arrays (arranged here in a non-interacting 3×3 configuration), digital electronics to minimize control lines using row-column addressing and analog LC resonators for multiplexed readout, all operating at 50 mK.
With the microwave resonators (6-8 GHz range), they showed dispersive readout of the charge state of the QDs and performed combined time- and frequency-domain multiplexing, enabling scalable readout while reducing the overall chip footprint.
This modular architecture probes the limits to-wards the realization of a large-scale silicon quantum computer integrating quantum and classical electronics using industrial CMOS technology.
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